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    ECE 564 ASIC and FPGPA Design With Verilog
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Modern digital design practices based on Hardware Description Languages (Verilog, VHDL) and CAD tools, particularly logic synthesis. Emphasis on design practice and the underlying algorithms. Introduction to deep submicron design issues, particularly interconnect and low power and to ASIC applications, and decision making. 3 credit hours.

 
   

Instructor
 

Dr. Paul D. Franzon, Professor
Director, Electronics Research Lab
Department of Electrical and Computer Engineering
443 MRC (Larry K. Monteith Engineering Research Center)
Campus Box 7911
NC State University
Raleigh, NC 27695-7911

Phone: 919-515-7351
Fax: 919-515-2285
Email: paulf@ncsu.edu
Homepage: http://www.ece.ncsu.edu/erl/faculty/paulf.html

   
    ECE 564 Moodle Course Website
   
   

NOTE: ECE 564 is managed entirely by the instructor. All of your materials for the course, including lecture recordings, should be accessible from the instructor's Moodle page (linked above). You should direct any questions or concerns about accessing course materials directly to Dr. Franzon (paulf@ncsu.edu).