ECE 563 Microprocessor Architecture
3 Credit Hours
Architecture of microprocessors. Measuring performance. Instruction-set architectures. Memory hierarchies, including caches, prefetching, program transformations for optimizing caches, and virtual memory. Processor architecture, including pipelining, hazards, branch prediction, static and dynamic scheduling, instruction-level parallelism, superscalar, and VLIW. Major projects.
Prerequisite
Graduate Standing
Proficiency in C/C++
Topics of Study
- Introduction and overview (1 lecture)
- Technology trends and quantitative analysis (2 lectures)
- Pipelined microarchitectures (5-6 lectures)
- Branch prediction (2-3 lectures)
- Out-of-order execution (7-8 lectures)
- Memory hierarchy design (7-8 lectures)
- Instruction set design (2 lectures)
- Midterm exam (1 lecture)
Grading
| Exams x2 | 50% |
| – Midterm Exam | 20% |
| – Final Exam | 30% |
| Homework Assignments | 5% |
| Projects | 40% |
| Quizzes | 5% |
Textbook
Required textbook:
Computer Architecture: A Quantitative Approach, Sixth Edition(opens in new window). John Hennessy and David Patterson. Morgan Kaufmann (Elsevier Science & Technology Books), 2017,
ISBN: 9780128119051
$109.95 (print – paperback)
$66.75 (“All-In” – digital textbook – FAQ(opens in new window))
General purpose programming tools available on the EOS system.
Updated: 10/31/2022